The invention relates to a differential amplifier circuit and a display drive circuit using the same, and particularly relates to a technique capable of suitably used in a display drive circuit which is connected to a high-resolution display panel.
A display panel such as a liquid crystal display (LCD) panel includes a plurality of scanning electrodes (also referred to as gate electrodes) and a plurality of signal electrodes (also referred to as source electrodes), and includes display cells having pixel capacitors (liquid crystal capacitors) at intersections thereof. The display resolution corresponds to the number of pixels, and is specified by a product of the number of lines (the number of gate electrodes) and the number of pixels per line (corresponding to the number of source electrodes). In a display drive circuit which is connected to the display panel and drives the source electrodes, loads on the source electrodes increases and the number of source output channels also increases due to an increase in the resolution of the display panel and high definition thereof. Since a display driver integrated circuit (IC) equipped with the display drive circuit is mounted along one side of the display panel, a line length to the pixel capacitor of the display cell located at a distal end increases due to an increase in the number of lines (the number of gate electrodes), and thus line resistance and line capacitance increase. Under such a background, in the display drive circuit, loads on the source electrodes increase due to an increase in the resolution of the display panel and high definition thereof.
JP-A-2011-124782 discloses a differential amplifier circuit which is suitable for a liquid crystal panel drive circuit (source amplifier) of such a liquid crystal display and has a high slew rate. A current which flows through a transistor constituting a differential pair increases only for a period of time shorter than the transition time of a reverse operation of a differential input signal in synchronization with the reverse operation of the differential input signal. The differential amplifier disclosed in JP-A-2011-124782 includes a differential pair transistor to which a differential signal is input and a constant current source which controls a current flowing through the differential pair transistor, and also includes a switch which is connected in parallel to the constant current source and increases a current flowing through the differential pair transistor. During a period in which the switch is turned on, a slew rate of the differential amplifier is improved. Turning-on and turning-off of the switch are controlled by control signals SRN and SRP which are generated from a synchronization signal STB such as a strobe signal indicating display timing. A time interval for improving a slew rate is adjusted depending on pulse widths of the control signals SRN and SRP.